The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 16, 2001
Filed:
Oct. 23, 1998
Peter Charles Eastty, Eynsham, GB;
Peter Damien Thorpe, Botley, GB;
Christopher Sleight, Chipping Norton, GB;
Sony United Kingdom Limited, Weybridge, GB;
Abstract
A signal processor for 1-bit signals comprises an nth order D Sigma Modulator (DSM) having an input (,) for receiving a 1-bit signal and an output (,) at which a processed 1-bit signal is produced by a quantizer (Q). The quantizer (Q) receives a p-bit signal from a series of 5 signal integration stages. Each stage comprises a first 1-bit multiplier (An) coupled to the input (,), a second 1-bit multiplier (Cn) coupled to the output (,), an adder (,n) which sums the outputs of the coefficient multipliers and an integrator (,n) which integrates the output of the adder (,n). A final stage comprises a coefficient multiplier (An+1) and an adder (,n+1). The adder (,n+1) sums the output of the coefficient multiplier (An+1) and the output of the integrator of the preceding integration stage. The input signal is fed to all the stages except the final stage via a 1-bit delay. The output signal of the quantizer is fed back to the stages via a 1-bit delay. The final stage receives the input signal without delay and also receives from the preceding stage the integral corresponding in timing to the input bit received thereby.