The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 09, 2001
Filed:
Feb. 20, 1998
Applicant:
Inventor:
Guy Dupenloup, Marly-le-Roi, FR;
Assignee:
LSI Logic Corporation, Milpitas, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/750 ;
U.S. Cl.
CPC ...
G06F 1/750 ;
Abstract
A method of synthesizing integrated circuit chip (IC) designs having clock signals defined internal to a module comprising the steps of mapping the IC design to a target technology with the internal clock defined, removing definitions of the internal clock, re-synthesizing the IC design, and re-defining the internal clock using new names of clock sources.