The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2001

Filed:

Apr. 15, 1998
Applicant:
Inventors:

Roland T. Knaack, Suwanee, GA (US);

Bruce Lorenz Chin, Duluth, GA (US);

Assignee:

Integrated Device Technology, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 2/900 ;
U.S. Cl.
CPC ...
G11C 2/900 ;
Abstract

Methods of testing integrated circuits to include data traversal path identification information include the steps of transferring test data into an integrated circuit containing devices therein and then controlling operation of the integrated circuit so that the test data traverses a first path through the devices. At least a portion of the test data and an identification of at least a first portion of the first path are then retrieved from the integrated circuit. This retrieving step may be preceded by the step of overwriting a first portion of the test data with an identification of a first portion of the first path. In the case of a buffer memory device, an identification (e.g., address) of a current write register (receiving test data) may be “tagged” to a series of test words written into the current write register during test mode operation. Similarly, when the test data is ultimately read from the buffer memory device, an identification of a current read register may be “tagged” to the series of test words being read from the current read register. The tagged identification may be interleaved into the stream of test data being read from the current read register, may be overwritten into the stream or the address may be separately stored in the device and then provided (along with other path identification and status information) as a serial or parallel stream of identification data from a dedicated test I/O pad.


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