The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 09, 2001

Filed:

Oct. 22, 1999
Applicant:
Inventor:

Fred Jenne, Los Gatos, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C 1/604 ;
U.S. Cl.
CPC ...
G11C 1/604 ;
Abstract

According to one embodiment, a nonvolatile storage circuit (,) can include a volatile portion (,) that includes p-channel metal-oxide-semiconductor (MOS) transistors (,-,and,-,) and n-channel MOS (NMOS) transistors (,-,and,-,) arranged in a complementary MOS (CMOS) latch configuration. Also included are nonvolatile devices (,-,and,-,) disposed between PMOS transistor,-,and NMOS transistor,-,, and between PMOS transistor,-,and NMOS transistor,-,. Nonvolatile devices (,-,and,-,) can include silicon-oxide-nitride-semiconductor (SONOS) transistors that can be programmed to opposite states to recall a logic value when power is applied to the nonvolatile storage circuit (,). In a read mode, a bias voltage VBIAS can be applied to nonvolatile devices (,-,and,-,) that tends to retain charge in both nonvolatile devices (,-,and,-,).


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