The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2001
Filed:
May. 29, 1998
Applicant:
Inventor:
Masayoshi Ohkawa, Tokyo, JP;
Assignee:
NEC Corporation, Tokyo, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C 1/600 ;
U.S. Cl.
CPC ...
G11C 1/600 ;
Abstract
A memory cell having a floating gate is formed on a semiconductor substrate of a first conduction type and is disposed in a region having a deep well of a second conduction type formed to a semiconductor substrate and a shallow well of a first conduction type formed in the deep well. An erasing operation of emitting electrons from floating gates is conducted utilizing a tunneling phenomenon by setting a control gate terminal to ground voltage and a source terminal S to V,. The deep and shallow wells are supplied with V,at time t1 and a source terminal is supplied with V,at time t2 after a predetermined period of time from time t1 has elapsed.