The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2001

Filed:

Jun. 01, 1999
Applicant:
Inventor:

Yuu Yamaguchi, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03G 3/30 ;
U.S. Cl.
CPC ...
H03G 3/30 ;
Abstract

For the purpose of enhancing power efficiency, according to the invention featuring efficiency control to maximize power efficiency, an arithmetic circuit calculates the input power from a detected voltage and a detected amperage, and also calculates the power efficiency of an amplifier from the input power and output power levels. The calculated efficiency value is outputted to a comparator and stored into a memory element. The comparator compares the currently inputted efficiency value and the efficiency value stored into the memory element in the preceding round. If the current efficiency value is higher than that of one round before, the gate voltage control circuit is controlled in the same direction as that of the control of the preceding round. If the current efficiency value is lower than that of one round before, the gate voltage control circuit is controlled in the direction reverse to that of the control of the preceding round. If the current efficiency value is identical with that of one round before, the gate voltage control circuit is controlled so as to keep the gate voltage at its level in the preceding round.


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