The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2001

Filed:

Jan. 12, 2000
Applicant:
Inventor:

John Gordon Hogeboom, Nepean, CA;

Assignee:

Nortel Networks Limited, Montreal, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 ;
U.S. Cl.
CPC ...
H03F 3/45 ;
Abstract

A receive amplifier for high-speed data has a differential input stage with a very wide common-mode rejection range and low offset voltage. This input stage interfaces the differential data signals to be received. The input stage is a dual complementary differential configuration of ten MOS transistors preferably connected to provide a pair of differential inputs, a pair of differential outputs, and a single common-mode feedback input. The latter feedback input is used in the preferred embodiment to achieve balance and high common-mode rejection. Two-transistor CMOS inverters are preferably used both as amplifying stages after the input stage and as a feedback amplifier. In alternative embodiments, the nodes connected to the feedback input are instead reconnected to fixed voltages, typically one of the supply voltages or a fixed intermediate voltage, to form two independent amplifiers, one for each input node.


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