The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 02, 2001
Filed:
May. 03, 1999
Thomas Clark Bryan, Encinitas, CA (US);
Harry Huy Dang, San Diego, CA (US);
Applied Micro Circuits Corporation, San Diego, CA (US);
Abstract
A CMOS buffer for interfacing TTL-standard signals and capable of driving a high capacitance load such as a transmission line with low switching noise and low power consumption. The CMOS buffer includes two CMOS branch circuits that control the operation of a CMOS output device. Each branch circuit includes a first delay and a second delay greater than the first delay. The CMOS output device includes a complementary pair of MOS transistors. The first MOS transistor of the CMOS output device is operated by the first branch circuit in response to a signal that is delayed by the first or the second delay. The second MOS transistor of the CMOS output device is operated by the second branch circuit in response to delay of the signal by the second or the first delay.