The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 02, 2001

Filed:

Oct. 19, 1999
Applicant:
Inventors:

Michihiko Mifuji, Kyoto, JP;

Satoshi Kageyama, Kyoto, JP;

Assignee:

Rohm Co., Ltd., Kyoto, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/131 ; H01L 2/14763 ;
U.S. Cl.
CPC ...
H01L 2/131 ; H01L 2/14763 ;
Abstract

A USG layer,is formed to cover an aluminum wiring,deposited a field oxide film,An organic SOG layer,whose thick layer can be easily formed is formed in a groove on the surface of the USG layer,Thus, the unevenness of the surface of the USG layer,can be relaxed in a degree. Further, an USG layer,is formed thereon is formed through the vapor phase growth technique using the high density plasma which can realize excellent embedding. Accordingly, the inter-metal dielectric film,having a flat upper surface can be formed. Further, the SOG step is carried out only once in the step of forming the organic SOG layer,thereby reducing the production cost. Further, since the organic SOG layer,can be encircled by the USG layers,and,having good film quality, even if the material of the organic SOG layer,is not so good, the inter-metal dielectric film,with an excellent dielectric property can be formed. Thus, a method for manufacturing a semiconductor device which can form the dielectric film having excellent dielectric property and an upper flat surface at low production cost and in a short lead time.


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