The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 26, 2000

Filed:

Mar. 19, 1998
Applicant:
Inventors:

Mihai G Statovici, San Jose, CA (US);

Ronald J Mack, Gilroy, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
714724 ; 324 731 ;
Abstract

A method and software apparatus are provided for implementing a dynamically modifiable test flow for integrated circuit devices that adapts to the characteristics of each processed device lot. According to the method of the invention, a modified set of tests sufficient to ensure proper device function for a particular lot is performed, reducing test costs and increasing test capacity. The method and system of the invention periodically samples a predetermined sample number of devices using a full set of tests including a set of skippable tests. Depending upon the performance characteristics of the sample device group on the skippable tests, a number of skippable tests are skipped during a modified test flow. After a next set of devices is tested using the modified test flow, the full set of tests is again performed on another sample group, and the size and makeup of the modified test flow is adjusted according to the new results. A test summary logs the results of regular and skippable tests, providing user access to enable system modification according to desired acceptance quality levels.


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