The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2000
Filed:
Jul. 14, 1999
Geeing-Chuan Chern, Cupertino, CA (US);
Programmable Microelectronics Corporation, San Jose, CA (US);
Abstract
A single-poly, floating gate memory cell includes a PMOS write and an NMOS read path. The memory cell's write path includes a PMOS half-transistor coupled in series with a PMOS write select transistor. The PMOS half-transistor serves as a storage element and includes a P+ drain region, a polysilicon floating gate, and a buried control gate. The read path includes an NMOS read transistor coupled in series with an NMOS read select transistor, where the floating gate of the PMOS half-transistor programming element serves as the gate of the NMOS read transistor. The memory cell is programmed along the PMOS write path by injecting electrons from a P-channel region of the PMOS half-transistor into the floating gate, and is read along the NMOS read path by conducting a channel current through an N-channel region of the NMOS read transistor.