The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 26, 2000
Filed:
Mar. 12, 1999
Joseph G Gillette, Margate, FL (US);
Scott G Potter, Coconut Creek, FL (US);
Robert J Mulligan, Lauderhill, FL (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
A high density electrical interconnect is achieved by incorporating a flexible circuit (140) that is removably connected to a low insertion force, ball grid array connector (100). The flexible circuit has a plurality of conductive runners (142), and each of the runners has a termination (144). The terminations are arranged in an array on the end of the flexible circuit. The low insertion force connector consists of a substrate (120) that has a pattern of pads (122) corresponding to the array on one side. The other side of the substrate has a corresponding array (124) that is electrically connected to the pads by conductive vias. An alignment feature (470) aligns the array on the flexible circuit to the pattern of pads on the substrate. Contact between the flexible circuit and the substrate is maintained by a compression means (150) that provides sufficient compressive force (310) to establish electrical connection between the array and the pads. The flexible circuit is removably connected to the low insertion force connector by insertion through the z-axis (149) of the substrate.