The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 19, 2000

Filed:

Sep. 17, 1998
Applicant:
Inventor:

Joe M Poss, Rochester, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11B / ;
U.S. Cl.
CPC ...
360 46 ; 360 51 ; 375345 ; 375362 ;
Abstract

A high speed analog timing and gain feedback control methods and a low power analog tracking timing and gain feedback apparatus are provided for data detection, such as, partial-response maximum-likelihood (PRML) data detection in a direct access storage device (DASD). The interleaved gain and timing tracking control circuit includes an even interleave gain and timing tracking control providing an even interleave gain error signal and an even interleave timing error signal; and an odd interleave gain and timing tracking control providing an odd interleave gain error signal and an odd interleave timing error signal. The even interleave gain error signal and the odd interleave gain error signal are combined to provide a resulting gain control signal. The even interleave timing error signal and the odd interleave timing error signal are combined to provide a resulting timing control signal. The resulting gain control signal is applied to a variable gain amplifier and the resulting timing control signal is applied to a variable clock circuit in a data channel of a direct access storage device (DASD).


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