The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 19, 2000
Filed:
Dec. 18, 1998
Men-Chee Chen, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A method of forming a floating gate memory device having a memory array region (11), a first periphery region (15), and a second periphery region (17) is provided that comprises forming a polysilicon gate (18) insulatively disposed outwardly from a substrate (10) in the memory array region (11). The polysilicon gate (18) is doped with nitrogen ions. A first oxide layer (20) is formed outwardly from the substrate (10) in the first and second periphery regions (15) and (17) and from the polysilicon gate (18) of the memory array region (11). The thickness of oxide formed outwardly from the substrate (10) is greater relative to the thickness of oxide formed outwardly from the polysilicon gate (18). The first oxide layer (20) in the second periphery region (17) is removed. A second oxide layer (22) is formed outwardly from the substrate (10) of the second periphery region (13), from the first oxide layer (20) in the first periphery region (15) and from the polysilicon gate (18) of the memory array region (11). The thickness of the second oxide layer (22) formed in the first and second periphery regions (15) and (17) is greater relative to the thickness of oxide formed in the memory array region (11).