The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2000
Filed:
Oct. 22, 1999
Kelvin E McCollough, Austin, TX (US);
Motorola, Inc., Schaumburg, IL (US);
Abstract
In accordance with the present invention, a frequency modulating phase-locked-loop (FMPLL) (100) architecture is implemented. The frequency of the FMPLL (100) is controlled using a current controlled oscillator (ICO) (126). The ICO (126) receives a current signal incorporating feedback to maintain a fixed gain. The ICO (126) associated with the FMPLL (100) establishes a predictable change in the output frequency for a given change in its input controlled current (ICTL). Relying upon this fixed gain, a frequency shift can be created by summing in an additional delta current (IMOD) to the input control current. By periodically varying the magnitude of the current IMOD, a frequency modulated clock is produced at the output of the ICO 126. The magnitude of IMOD controls the amount of frequency shift of the frequency modulated clock. By providing an IMOD signal which is proportional to the generated system frequency, a frequency shift proportional to the average, or center, frequency is produced. Therefore, the percentage of frequency modulation is constant regardless of the magnitude of the system clock frequency.