The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2000
Filed:
Jan. 28, 2000
Manuel R Gheeraert, Nashua, NH (US);
Jeffrey B Van Auken, Littleton, MA (US);
Alex Gusinov, Lexington, MA (US);
Other;
Abstract
A method and circuit for error current compensation is presented. The method includes the steps of generating a first current and an associated error current, generating a second current and an associated error current substantially equal to the first current and the first error current, respectively, and generating a third current substantially equal to the first current. The method includes the additional steps of extracting the second error current from the second current, generating a multiplied current equal to the scaled error current plus a multiplier error current, and combining the multiplied current with the first current and first error current. The circuit for error current compensation includes a first, second and third current source, a multiplier, and a first and second subtractor. The first subtractor provides a first difference current equal to the difference of a second current and second error current generated by the second current source and a third current generated by the third current source. The multiplier generates a predetermined multiple of the second error current and a multiplier error current at its output terminal. The second subtractor provides a second difference current at its output equal to the difference of the predetermined multiple of the second error current and a multiplier error current from the output of the multiplier and a first current and first error current generated by the first current source. The second difference current is substantially equal to the first current from the first current source.