The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 12, 2000
Filed:
Sep. 11, 1998
Jeong-Soo Lee, Yongin, KR;
Samsung Electronics Co., Ltd., Kyungki-do, KR;
Abstract
An integrated circuit chip has a multi-layer input/output pad interconnection structure which allows input/output buffers to be flexibly coupled to input/output pads depending on the chip's applications. To obtain the multi-layer pad interconnection structure, a first interconnection layer is formed on a layer of a semiconductor wafer such that the first interconnection layer is electrically coupled to the input/output buffers. The first interconnection layer is patterned into the first interconnection lines. An insulating layer is formed on the first interconnection layer. A second interconnection layer is formed on the insulating layer such that the second interconnection layer is electrically coupled to the input/output pads and the first interconnection lines. The first interconnection lines and the second interconnection layer are electrically coupled to each other via contacts. The second interconnection layer is then patterned into a plurality of second interconnection lines.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile