The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 12, 2000

Filed:

Jul. 14, 1997
Applicant:
Inventors:

Michael A Crist, Lake in the Hills, IL (US);

David S Dehaan, Delavan, WI (US);

Ronald J Schmidt, Grayslake, IL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
29840 ; 29593 ; 29832 ; 29833 ; 29834 ; 29842 ; 29843 ; 29874 ; 324757 ; 324758 ; 324763 ; 324764 ;
Abstract

A test strip (209-211) is associated with a circuit board (201-203) to facilitate inspection of the circuit board (201-203) during an assembly process (100). The board (201-203) has a plurality of pads (208) to receive solder paste (400) and electronic parts (600). The pads (208) are electrically coupled such that the received parts (600), once assembled, form an electronic circuit. The strip (209-211) has at least one pad (308, 310), electrically isolated from the pads (208), to receive solder paste (400) and/or parts (600). Inspection of the received solder paste (400) and/or parts (600) of the strip (209-211) indicates the accuracy of the received solder paste (400) and parts (600) on the pads (208) of the board (201-203).


Find Patent Forward Citations

Crist, Michael. (2000). Circuit board panel test strip and associated method of assembly (U.S. Patent No. 6158119). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6158119

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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