The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 05, 2000
Filed:
Dec. 23, 1997
Frank Gasparik, Monument, CO (US);
LSI Logic Corporation, Milpitas, CA (US);
Abstract
Data signal pins for a peripheral device are adaptively precharged during hot plugging to a voltage level depending on both the mode of operation (low voltage differential, high voltage differential, or single ended) and the actual signal voltages being employed for a particular mode. An active terminator bus provides an operating mode sensing signal, from which the operating mode of the bus and the actual signal voltage levels being employed may be determined. Signal pins on an edge connector for the device are connected, in sequence, to the corresponding ground, power supply, operating mode sensing signal, and data signal conductors of the bus. During the gap in time between connection of non-data signal pins (ground, power supply, and operating mode sensing pins) of the edge connector to the corresponding bus conductors and connection of the data signal pins while hot plugging, the precharge voltage level is generated on-board the peripheral device from the actual signal voltage levels being employed on the bus, and the data signal pins are precharged. The precharge voltage level is centered between the differential signal voltage levels for differential operating modes and centered between the hysteresis trip points for single ended operation modes. By precharging the parasitic capacitances of the data signal pins on the device to this voltage level, signal voltage levels on bus conductors are drawn toward this voltage level without changing the polarity of a differential signal or crossing a hysteresis trip point for a single ended signal.