The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 05, 2000

Filed:

Apr. 14, 1998
Applicant:
Inventor:

Shuran Wei, Bloomington, MN (US);

Assignee:

LSI Logic Corporation, Milpitas, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D / ;
U.S. Cl.
CPC ...
375376 ; 327148 ; 327149 ; 327150 ; 327156 ; 375373 ; 375374 ;
Abstract

A phase-locked loop includes a phase detector, a charge pump, a resistor-less loop filter and a voltage-controlled oscillator ('VCO'). The phase detector has a reference input, a feedback input, and a charge control output. The charge pump is coupled to the charge control output, and the resistor-less loop filter is coupled to the charge pump. The VCO has a control voltage input coupled to the resistor-less loop filter, a clock output coupled to the feedback input and a plurality of delay elements which are coupled together in series to form a ring oscillator. Each delay element includes a delay element output. A MOSFET gate oxide capacitance is coupled between each delay element output and the charge control output.


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Wei, Shuran. (2000). Fully integrated phase-locked loop with resistor-less loop filer (U.S. Patent No. 6157691). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6157691

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