Dynamic pull-up suppressor for column redundancy write schemes with

Abstract

A reduced complexity, dynamic pull-up suppressor for column redundancy write schemes with redundant data write lines is provided. Logic values of input data signals during the width of an internal write pulse are used to reduce the redundant data line crowbar while at the same time increasing the speed of the write to a redundant column. The full recovery capability of dynamic pull-up circuits, which are all enabled to speed up the recovery of the redundant data write lines at the end of the write operation, is available. The data write bus is separated from the redundant write lines, thus ensuring a consistent loading of the data write bus independent of whether redundancy is used or not. According to one embodiment, a circuit including dynamic pull-up elements configured to drive a redundant data line of a memory device to a logic state according to a state of an input data signal is provided. The circuit may further include a static pull-up circuit configured to hold the redundant data line at a logic high potential when column redundancy is not used and solid data is written.