The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 28, 2000

Filed:

May. 09, 1997
Applicant:
Inventors:

Mark T Feuerstraeter, Rancho Cordova, CA (US);

Michael A Sokol, Rancho Cordova, CA (US);

David W Vogel, El Dorado Hills, CA (US);

Assignee:

Level One Communications, Inc., Sacramento, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
A04J / ;
U.S. Cl.
CPC ...
370463 ; 370469 ;
Abstract

A PHY having a media independent interface (MII) providing connections to a MAC or to another PHY is disclosed. The invention provides a mechanism for connecting a first PHY with a second PHY, wherein the PHY may act as the media access control side of the MII. The system includes a selection means for selecting the mode of operation for the PHY, a MII for providing a synchronous digital interface carrying un-encoded data over separate transmit and receive paths and a translation entity for generating output enables for controlling the flow of the data, wherein the translation entity establishes in response to mode being selected a first flow of data for connecting the PHY to a Media Access Control entity or a second flow of data for connecting the PHY to a second PHY. The translation entity muxes data and control signals based upon the mode selection. A translation synchronization entity is provided. The synchronization entity may includes a 10 Mbps synchronization entity and/or a 100 Mbps synchronization entity. The MII receives a transmit and receive clock from a second PHY when the PHY is connected to a second PHY, and the translation synchronization entity synchronizes the internal clocks and the MII transmit and receive clocks. An interface to a 10 or 100 Mbps repeater entity is provided wherein the interface maps a transmit data path from the translation entity to the repeater entity and receive data paths from the repeater entity to the translation entity.


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