Dual-stage switched-capacitor dac with scrambled msb's

Abstract

A digital-to-analog converter (DAC) uses switched capacitors summed, to an op amp to generate the analog output voltage. Least-significant-bits (LSBs) of the digital input switch a reference voltage to binary-weighted capacitors. The most-significant-bits (MSBs) are thermometer-coded and switch the reference voltage to capacitors that have a same size, double the size of the maximum LSB's capacitor. The thermometer-coded MSB's are scrambled before switching the same-size capacitors so that the assignment of a digital input bit to a capacitor varies from sample to sample. Any variation in capacitances for the same-size capacitors is thus spread to different digital values so that errors do not occur consistently for the same digital values. The scrambler uses radix-2 butterflies to swap bit assignments and thus outputs an even number of signals to the capacitors. Since the thermometer code is an odd number of signals, an extra signal is present that is always driven high or low. Scrambling makes the location of the extra signal unknown. A dummy same-size capacitor is driven to an opposite voltage to compensate for the extra signal. The DAC is further divided into two stages, with the lower stage scaled down to the minimum capacitor size by a linking capacitor to the upper stage.