The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 28, 2000
Filed:
Sep. 01, 1999
Applicant:
Inventor:
D C Sessions, Phoenix, AZ (US);
Assignee:
VLSI Technology, Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323315 ;
Abstract
A high differential impedance load device. The present invention recites a load device including a first lead, a second lead, a first current mirror, a second current mirror, and a third lead. First lead, second lead, and third lead are coupled to first current mirror and second current mirror such that a current sunk on first lead is approximately equal to a current sunk on second lead. Third lead represents a reference voltage which is ground.
Quick Actions:
Sessions, D. (2000). High differential impedance load device (U.S. Patent No. 6154018). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6154018
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile