The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 21, 2000

Filed:

Nov. 07, 1997
Applicant:
Inventors:

Kerry John Vahala, San Gabriel, CA (US);

Roberto Paiella, Milan, IT;

Guido Hunziker, Neyruz, CH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02B / ;
U.S. Cl.
CPC ...
385 11 ; 385 14 ; 385 16 ; 385 24 ;
Abstract

All-optical logic gates in which binary words are encoded using wavelength. A method and apparatus for processing information in this wavelength encoded format is provided. The processing may occur entirely in the optical domain. This approach is modular and enables construction of logic gates using custom wave guide chips that can be mass-produced in a manner similar to that of conventional electronic digital chips. Specific gates, such as AND, OR, EXOR, or NAND, may be 'programmed' into a given chip during its fabrication to encode the desired truth table. The output states of the chip are determined by ultrafast mixing of binary encoded wavelengths in a semiconductor optical amplifier. The result is a new wavelength having a relationship to the input wavelengths determined entirely by the desired truth table. The possible clock-rates for these gates can be exceedingly high, such as several hundred Gigabits/second. The product of integer word length 'N' and gate clock speed can exceed several Terabits/second and may be as high as the overall optical bandwidth of the system. Complicated multi-input functions may be constructed using this approach and dynamically programmable functions may be built in which either electrical or optical signals reconfigure a set of gates by reprogramming the inverter operations in the chips.


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