The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 21, 2000
Filed:
Oct. 28, 1999
Applicant:
Inventor:
Jae Whan Kim, Ichon-shi, KR;
Assignee:
Hyundai Electronics Industries Co., Ltd., Ichon-shi, KR;
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
365145 ; 365 63 ; 257295 ; 257300 ;
Abstract
A ferroelectric memory device includes a plurality of groups of active areas, each active area having two memory cells, and a plurality of pairs of conductive lines arranged in a parallel fashion, each conductive line having a word line and a plate line, wherein a pair of the word line and the plate line are isolated through an insulating layer, wherein each group of the active areas are coupled to each pair of the conductive lines, thereby having a folded bit line architecture without increasing a chip size.
Quick Actions:
Kim, Jae. (2000). Ferroelectric memory device having folded bit line architecture (U.S. Patent No. 6151243). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6151243
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile