The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 14, 2000
Filed:
May. 09, 1997
Jeffrey Ying, Glendora, CA (US);
Michael Kuang, Diamond Bar, CA (US);
I/O Control Corporation, Azusa, CA (US);
Abstract
A control network has a bus to which is connected a master node and a plurality of slave nodes in a loop configuration. Each of the master node and slave nodes has a transceiver connected to the bus through a shunt circuit. The shunt circuit comprises a switch (such as a relay) in parallel circuit configuration with an impedance element (such as resistor). The switch is operated under control of the node and under normal conditions remains closed, thereby allowing signals to be carried freely over the bus. When a fault occurs, each of the nodes opens its switch, causing the separate portions of the bus to become isolated. The master node then instructs each slave node, starting with the closest slave node, to close its switch. When a slave node fails to respond, the fault location has been detected. The master node repeats the process for the opposite direction of the loop. Operation then continues, with the slave node nearest the fault remaining isolated. If the short circuit occurs at the master node, one of the slave nodes may take over for the master node after a predetermined wait period.