The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 14, 2000

Filed:

Dec. 23, 1997
Applicant:
Inventors:

Albert Ott, Bissingen/Teck, DE;

Wilhelm Tamm, Aidlingen, DE;

Steffen Laur, Tuebingen, DE;

Volker Harr, Herzogenroth, DE;

Assignee:

Hewlett-Packard Company, Fort Collins, CO (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324754 ; 324757 ;
Abstract

An adapter arrangement for electrically testing printed circuit boards consists of two probe adapters with a uniform grid separation of the probes and two translator foils on whose sides facing the probe adapters there are contact areas with the pitch of the probe adapter. On the sides facing the printed circuit board, the arrangement of the contact areas and the contact points located thereon is the same as the grid on the printed circuit board under test. Between the translator foils a vacuum is generated with the help of rubber seals, a through hole, a valve and a suction hose. This vacuum creates a rigid package which permits good contact with the probes on both sides. The inserted support layers, which can be conventional printed circuit boards, prevent the translator foils from buckling. The various types of extremely complex printed circuit board can be electrically tested rapidly and cheaply using this arrangement. The arrangement can be employed on both double-sided and one-sided electrical test installations.


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