The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 07, 2000

Filed:

Apr. 20, 1998
Applicant:
Inventors:

Marian N Webster, Eindhoven, NL;

Albertus G Dirks, Eindhoven, NL;

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438660 ; 438688 ;
Abstract

A method of manufacturing a semiconductor device with a multilayer wiring (6, 11, 14) with aluminum conductor tracks (7, 12, 15) which are insulated from one another by insulating layers (9, 13). According to the method, an aluminum conductor track (20) provided on a surface (1) of a semiconductor body (2) is covered with a layer of insulating material (21), whereupon a contact window (22) with a wall (23) reaching down to the conductor track is formed in this insulating layer. A conductive intermediate layer (24, 28) and an aluminum layer (25, 29) are provided on this wall, whereupon a heat treatment is carried out such that aluminum (26) grows from the conductor track into the contact window. A conductive intermediate layer of titanium is provided on the wall of the contact window. A very thin, closed aluminum layer, which remains closed also during the heat treatment, can be formed on this titanium layer, which can be provided on the wall with a small thickness. The method is accordingly suitable for making semiconductor devices with multilayer wirings having contact windows of 0.5 .mu.m or smaller and having aspect ratios above 1.


Find Patent Forward Citations

Webster, Marian. (2000). Method of manufacturing a semiconductor device with a multilayer wiring (U.S. Patent No. 6143651). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6143651

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…