The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 31, 2000
Filed:
Jun. 11, 1999
Stephen Fuchs, Chanhassen, MN (US);
Andrew J Wardrop, Lakeville, MN (US);
Abstract
A computer system uses redundant voting at the hardware clock level to detect and to correct single event upsets (SEU) and other random failures. In one preferred embodiment, the computer includes four or more commercial processing units (CPUs) operating in strict 'lock-step' and whose outputs (33, 37) to system memory and system bus are voted by a gate array which may be implemented in a custom integrated circuit. A custom memory controller interfaces to the system memory and system bus. The data and address (35, 37) at each write to and read from memory within the computer are voted at each CPU clock cycle. A vote status and control circuit 'reads' the status of the vote and controls the state of the CPUs using hardware and software. The majority voted signals are used by the agreeing CPUs 32 to continue processing operations without interruption. The system logic selects the best chance of recovering from a detected fault by re-synchronizing all CPUs, powering down a faulty CPU or switching to a spare computer, resetting and re-booting the substituted CPUs.