The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 31, 2000

Filed:

Nov. 12, 1998
Applicant:
Inventors:

Ching-yuh Tsay, Plano, TX (US);

Eric G Soenen, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ; H03M / ;
U.S. Cl.
CPC ...
341120 ; 341118 ;
Abstract

A trimming algorithm for a pipeline A/D converter includes the step of trimming the input sampling capacitor on each of the gain stages for each stage of the pipeline A/D converter. The input thereof is swept from a minimum to a maximum analog voltage and then the integral non-linearity (INL) of the A/D converter determined. The maximum transitions are then examined to determine which transitions are associated with which stage. The transitions for a given stage then constitute the gain error for these stages. The trim values are determined from this gain error and then the trim values incorporated into each of the gain stages.


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