The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 24, 2000

Filed:

Mar. 20, 1998
Applicant:
Inventors:

Michael Bermingham, Framingham, MA (US);

Christopher S MacLellan, Norwood, MA (US);

John K Walton, Mendon, MA (US);

Assignee:

EMC Corporation, Hopkinton, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
710104 ; 710102 ; 710103 ; 713300 ; 713330 ; 713340 ; 365 26 ;
Abstract

A method and apparatus for hot-plugging circuit boards having lower voltage logic devices into a higher voltage backplane in a manner that minimizes overvoltage stress during system power-up, or during a lower voltage power failure. The method and apparatus ensures that the lower voltage device(s') power input reaches at least a nominal input level before any other inputs of the device are driven to a level greater than or equal to an expected input level. Dedicated output pins on lower voltage logic device(s) are configured to issue a control output signal for enabling higher voltage devices. Output enable terminals for the higher voltage parts, which are connected to respective control outputs from a lower voltage device, are normally in a disabled state as a function of pull-up or pull-down circuitry. A respective control output signal is provided for each higher voltage device output enable to enable the outputs of the higher voltage device when the voltage supply input to the lower voltage device is at substantially full voltage.


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