The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 24, 2000
Filed:
Sep. 21, 1998
Kazuto Matsuo, Samukawa-machi, JP;
Toyo Communication Equipment Co., Ltd., Kanagawa, JP;
Abstract
A method and a circuit for multiplication on a finite field which operate fast and involve a small circuit scale. There is provided a multiplication circuit on a finite field for multiplication of two arbitrary elements a=(a.sub.0, a.sub.1, . . . , a.sub.m-1) and b=(b.sub.0, b.sub.1, . . . , b.sub.m-1) of a Galois field GF(2.sup.m) utilizing a polynomial .function.=x.sup.m +x.sup.m-1 + . . . +x+1 as a polynomial to derive the GF(2.sup.m) where said f has an irreducible increased number of order, the multiplication circuit comprising a first shift register having m stages whose initial value is one of the elements of the Galois field, m AND gates to which the other element of the Galois field and an output signal from the last m-th stage of the first shift register are input, a second shift register having m+1 stages having an exclusive OR gate at the input of each of the first through m-th stages thereof, and second m exclusive OR gates to which an output signal from the last (m+1)-th stage of the second shift register and an output signal from the first through m-th stages are applied.