Low voltage, high speed multiplexer

Abstract

A multiplexer for selecting a single output signal from a plurality of input signals. For a plurality of complementary input signal pairs in particular, the multiplexer includes for each pair of complementary input signals a control sub-circuit having a selection switch and a common resistance in parallel. The switch and the common resistance have a common low-potential node that is tied to a pair of resistances that are in parallel, wherein each of the parallel resistances is coupled to the respective high-potential nodes of a differential amplifier. A particular pair of incoming complementary input signal pairs controls the differential amplifier. An off-circuit selection signal selects which switch of a plurality of control sub-circuits is activated. When a switch is on, it creates a bypassing of the common resistance, thereby enabling the turn-on of output drivers coupled to the differential amplifier. When a switch is off, the potential drops across the common resistance and the parallel resistances reduce the potential at the output drivers' control nodes enough to block their turn-on. As a result, the only output drivers providing signal output are those associated with the one selected control sub-circuit having its switch turned on.