The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 24, 2000
Filed:
Jun. 30, 1999
Michael S Chung, San Jose, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
The present invention is a power-on reset circuit that generates a precise power-on reset pulse with an upper threshold voltage that is highly insensitive to variations in temperature and integrated circuit fabrication processes. The power-on reset circuit of the present invention includes a self-biased current generator capable of receiving a supply voltage and generating a first current, which is proportional to an absolute temperature, in response to receiving the supply voltage. The power-on reset circuit of the present invention also includes a base-emitter voltage detector that is coupled to the self-biased current generator such that a second current flowing though the base-emitter voltage detector is substantially equal to the first current generated by the self-biased current generator. Furthermore, the power-on reset circuit of the present invention includes a (BiCMOS) inverter that is coupled to the base-emitter voltage detector such that the BiCMOS inverter generates the power-on reset pulse as the supply voltage is turned on. With such a power-on reset circuit of the present invention, the upper threshold voltage of the power-on reset pulse may be optimized to be independent of the absolute temperature and to be insensitive to variations in the power supply voltage and in integrated circuit fabrication process parameters. In addition, the upper threshold voltage of the power-on reset pulse of the present invention is independent of a voltage across a drain and source of any MOSFET (Metal Oxide Semiconductor Field Effect Transistor) with the power-on reset circuit topology of the present invention.