The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 17, 2000
Filed:
Oct. 05, 1998
Colin S Bill, Cupertino, CA (US);
Jonathan S Su, Evanston, IL (US);
Takao Akaogi, Cupertino, CA (US);
Ravi P Gutala, Milpitas, CA (US);
Advanced Micro Devices, Sunnyvale, CA (US);
Fujitsu, Ltd., Kanagawa, JP;
Abstract
A flash Electrically-Erasable Programmable Read-Only Memory (EEPROM) includes a plurality of floating gate transistor memory cells, a plurality of wordlines connected to the cells and a power source for generating a low power supply voltage on the order of 3 V or less. A wordline driver includes a booster for boosting the supply voltage to produce a wordline read voltage which is higher than the supply voltage, and applying the wordline voltage to a wordline. An upper clamp limits a maximum value of the wordline voltage to prevent read disturb. The upper clamp can be configured to reduce an amount by which the maximum value varies with the supply voltage, or to limit the maximum value to substantially a predetermined value. A lower clamp limits the wordline voltage to a minimum value which is higher than the supply voltage and lower than the maximum value for a predetermined length of time at the beginning of the read operation to ensure that the cells have sufficient read current and to reduce the amount by which the minimum value varies with the supply voltage.