The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 17, 2000

Filed:

Feb. 21, 1997
Applicant:
Inventors:

Visweswaren Sivaramakrishnan, Santa Clara, CA (US);

Tirunelveli S Ravi, Santa Clara, CA (US);

Kramadhati V Ravi, Atherton, CA (US);

Assignee:

Applied Materials, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C23C / ;
U.S. Cl.
CPC ...
118719 ; 118715 ; 118725 ; 118729 ; 118730 ; 156345 ;
Abstract

A dual wafer processing apparatus (4) includes a chamber housing (14) defining an interior and having upper, lower and central portions (18, 20, 16). An electrostatic chuck (34) has electrostatic chucking surfaces (38, 40) on opposite sides. The chuck is rotatably mounted within the chamber housing so that the chucking surfaces face the upper and lower portions of the chamber housing. After a wafer (36) is positioned on a chucking surface, electrostatic forces are used to maintain the wafer secured to the chucking surface. The chuck is then rotated 180.degree. to permit placement of a second wafer on the second chucking surface. Processing of the two wafers occurs simultaneously. Electrostatic chucking surfaces could be replaced by mechanical wafer clamps.


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Sivaramakrishnan, Visweswaren. (2000). Multiple substrate processing apparatus for enhanced throughput (U.S. Patent No. 6132517). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6132517

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