The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2000
Filed:
Mar. 18, 1999
Applicant:
Inventor:
Richard A Krzyzkowski, Ft. Collins, CO (US);
Assignee:
Agilent Technologies, Palo Alto, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; H03L / ;
U.S. Cl.
CPC ...
713503 ; 327158 ; 375376 ;
Abstract
A circuit and method for reducing error in a delay locked loop (DLL) in which a plurality of outputs, each establishing a boundary between two consecutive phases, is accomplished by averaging an error present in one of the outputs over at least two phases established by the outputs. A pair of inverters are used to drive fight during a definable time period, which enables the circuitry to average the error over at least two phases, thus distributing the error that was present in one phase over at least two phases.