The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2000

Filed:

Dec. 22, 1997
Applicant:
Inventor:

William J McNulty, River Forest, IL (US);

Assignee:

HD Electric Company, Waukegan, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324 731 ; 324764 ; 324546 ; 324548 ;
Abstract

A tester for power transformers and capacitors includes a pulse generator for applying a pulsating test signal to a pair of test leads which may be connected across the terminals of the device to be tested. Also connected across the test leads are a capacitor detector, an inductor detector and a continuity detector. If the connections to the transformer or capacitor in the device to be tested are good, the capacitor detector and inductor detector will distinguish one from the other and indicate that its condition is good. If the connections to the device are not good, the continuity detector will indicate whether there is a short circuit or open circuit condition. The detectors are coupled through control logic circuitry to an indicator circuit including a horn and blinking lights for providing unique indications of capacitor okay, inductor okay, short and open conditions. The capacitor detector provides a discharge path for a capacitor and detects the discharge current flow. The inductor detector responds to the kickback voltage of an inductor, which is of a polarity opposite to that of the input test pulse. The continuity detector measures voltage level to distinguish between impedance levels respectively corresponding to substantially open and substantially short circuit conditions.


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