The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 10, 2000
Filed:
Mar. 05, 1998
Yasushi Shizuki, Kanagawa, JP;
Mitsuo Konno, Kanagawa, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A semiconductor module has an MMIC chip flip-chip-mounted on a board. The MMIC chip has a ground line and bumps. The board has through holes and a ground electrode. These ground line, bumps, through holes, and ground electrode form a conductor continuum that defines a quasi-cavity. The module is designed so that the resonance frequency (fr) of the quasi-cavity is higher than the maximum operation frequency (fumax) of the MMIC chip. This prevents signal disturbance due to agreement between the resonance frequency (fr) and an operation frequency (fu) of the MMIC chip. If the MMIC chip is provided with bias circuits having MIM capacitors, the MIM capacitors are formed within the quasi-cavity. The quasi-cavity blocks magnetic fields generated by the MIM capacitors from leaking outside and badly affecting electronic parts arranged around the MMIC chip. The thickness of the MMIC chip is limited within a given range, to prevent coupling between a parasitic transmission line made of the substrate and ground line of the MMIC chip and a main transmission line on the MMIC chip, to thereby secure isolation between input and output signals to and from the MMIC chip.