The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 10, 2000

Filed:

Dec. 07, 1993
Applicant:
Inventors:

Timothy Jay Dell, Colchester, VT (US);

George Cheng-Cwo Feng, Essex Junction, VT (US);

Mark William Kellogg, Essex Junction, VT (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257678 ; 257690 ; 257691 ; 307480 ; 3073031 ;
Abstract

A packaging assembly for semiconductor memory modules using synchronous clocking signals distributed to each module within a package. The clock distribution network on the assembly is characterized by including a transmission line termination means, preferably a resistor, coupled immediately adjacent to one of the assembly input pins.


Find Patent Forward Citations

Dell, Timothy. (2000). Clock distribution system for synchronous circuit assemblies (U.S. Patent No. 6130475). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6130475

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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