The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2000
Filed:
Oct. 28, 1998
Applicant:
Inventors:
Terry Cain Coughlin, Jr, Johnson City, NY (US);
William Fredrick Lawson, Vestal, NY (US);
Assignee:
International Business Machines Corporation, Armonk, NY (US);
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327202 ; 327218 ;
Abstract
A latched receiver circuit capable of receiving data and clock simultaneously. New data is latched at every clock cycle without delay or buffering of the data or the clock. The latched receiver may also receive and latch small signals without the aid of a receiver preamp or added delay.
Coughlin, Jr, Terry. (2000). Zero set-up high speed cmos latched-receiver (U.S. Patent No. 6127867). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6127867
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile