Switch-capacitor circuit with overdrive-protected switch

Abstract

An input switch for use in a switch-capacitor circuit having unified architecture, and a switch-capacitor circuit including such an input switch, an amplifier, a capacitor between the amplifier and switch, and at least one NMOS transistor. The input switch samples an input potential in a sampling mode, receives a reference potential, and includes a transmission gate having a first NMOS transistor. The switch is configured to prevent the transmission gate from passing the reference to the capacitor when the reference is so low that the difference between the sampled input and reference is below an overdrive-causing level, thereby preventing capacitor charge loss which would otherwise lead to overdrive while the switch-capacitor circuit compares the reference with the sampled input. When the transmission gate includes a first PMOS transistor connected in parallel with the first NMOS transistor, the switch preferably includes an extra PMOS transistor in series with the first PMOS transistor and the trigger circuitry operates in the comparison mode to prevent the transmission gate from passing the reference to the capacitor when the reference is such that the difference between the sampled input and reference is below the overdrive-causing level.