The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 03, 2000
Filed:
Jun. 24, 1999
Parin B Dalal, Milpitas, CA (US);
Steve Hale, San Jose, CA (US);
Stephen C Purcell, Mountain View, CA (US);
Nital Patwa, San Jose, CA (US);
ATI International SRL, West Indies, BB;
Abstract
In accordance with the present invention, an adder tree structure includes at least two adder stages. In the circuit and method according to the present invention, the first of the two adder stages generates two bits of a common weight and other more significant bits of a weight one bit more significant than the two bits of the common weight. The second of the two adder stages includes an adder that receives the more significant bits generated in the first of the two adder stages. The second adder stage also includes an AND gate which receives and logically AND's the two bits of the common weight to generate a carry-in bit for the adder in the second stage. The above adder tree structure and adding method have an advantage of permitting more input terminals of adders to contain information about the input values to the adder tree structure. Therefore, the adders are used more efficiently and less adders are required to perform a specific function.