The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 03, 2000

Filed:

Sep. 29, 1998
Applicant:
Inventors:

Takashi Hirao, Moriguchi, JP;

Akihisa Yoshida, Kyoto, JP;

Toru Fukumoto, Kyoto, JP;

Kazuyasu Adachi, Hirakata, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438158 ; 438151 ; 438161 ; 438162 ; 438163 ;
Abstract

In a method of manufacturing a semiconductor device having an LDD structure, source gases for generating plural types of impurity ions exhibiting different molecular weights and different projected ranges in a target during impurity implantation are supplied to a plasma space, ionized, accelerated with a voltage, and implanted in a semiconductor region on the target substrate. In the case of manufacturing a top-gate transistor, a gate electrode on the semiconductor region has a sufficient thickness to serve as a mask. In the case of manufacturing a bottom-gate transistor, a mask and a resistor are used. An implantation angle is set to an optimum value as desired. Thereafter, the impurity is activated as desired. Thus, the semiconductor device having the LDD structure is manufactured by a single step of impurity implantation.


Find Patent Forward Citations

Loading…