The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 26, 2000
Filed:
Apr. 10, 1998
Fred W Verdi, Lawrenceville, NJ (US);
Richard Haynes, Princeton, NJ (US);
Lucent Technologies, Inc., Murray Hill, NJ (US);
Abstract
The present invention is directed to an integrated circuit package having improved EMI characteristics. In accordance with one aspect of the invention, a ball grid array integrated circuit package is provided for attachment to a circuit board. The circuit package includes a substrate having a semiconductor die defining an electronic circuit formed thereon. A matrix of spherically-shaped package leads is disposed adjacent the substrate and opposite the semiconductor die. Conductive elements, such as bond wires, electrically connect circuit points on the semiconductor die to the package leads. Further, at least one conductive element electrically interconnects each of the leads that define a perimeter of the matrix of package leads, for electrical connection to ground. In the preferred embodiment, adjacent leads of the perimeter matrix are separated by a spacing that is no greater than 1/20 of the wavelength of the highest frequency electrical signal carried on any of the signal leads. In accordance with another aspect of the invention, a printed circuit board assembly comprises a circuit board substrate having conductive elements and a socket area for receiving a semiconductor package, wherein the socket area is defined by a matrix of conductive pads. Each conductive pad includes a metal coating and is shaped to receive a lead of the semiconductor package. Finally, at least one conductive element or trace electrically connects each of the conductive pads that define a perimeter of the matrix of conductive pads, for electrical connection to ground.