Method for fabricating ultra-small interconnections using simplified

Abstract

A process for fabricating an interconnect structure, featuring contact of the interconnect structure, to an exposed side of an underlying conductive plug structure, where the conductive plug structure is used to communicate with an active device region in a semiconductor substrate, has been developed. The process features the use of simple photolithographic patterns, such as a stripe opening, exposing a group of gate structures, and a group of spaces, located between the gate structures, to be used for subsequent contact plug formation. This is in contrast to conventional processing, in which a more difficult photolithographic procedure is used to create smaller, individual openings, to individual spaces between gate structures. In addition this invention features a self-aligned opening, exposing only a side of a contact plug structure. An overlying interconnect structure then contacts only the exposed side of the underlying contact plug structure, again reducing photolithographic difficulties, encountered with conventional methods of creating a non-self aligned opening to an underlying contact plug.