The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 26, 2000

Filed:

Aug. 01, 1997
Applicant:
Inventor:

Akiko Sato, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
703 15 ; 345341 ; 345440 ; 345507 ;
Abstract

A method and equipment provide an extended logic simulation result which can be effectively displayed on one screen. The method of displaying a logic simulation result designates a display point in one cycle which corresponds to a clock signal and which is used in executing a logic simulation. At each cycle corresponding to the clock signal, the signal data at the display point are fetched and displayed continuously on a display unit. Efficiency of work on the display unit is enhanced by analyzing a result of a performed logic simulation during design and examination of logic circuits.


Find Patent Forward Citations

Sato, Akiko. (2000). Method of displaying logic simulation results and logic simulation (U.S. Patent No. 6123734). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6123734

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…