The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2000
Filed:
Jan. 21, 1998
Chao-Yuan Huang, Hsinchu, TW;
Abstract
A method of fabricating a via and an interconnection. On a substrate comprising a semiconductor device and a first metal layer, a first inter-metal dielectric layer is formed on the first metal layer. A photo-resist layer is formed on the first inter-metal dielectric layer. A single step of photolithography is performed to define a via hole region, an interconnection window region, and an isolation region simultaneously. The first inter-metal dielectric layer is etched using the photo-resist layer as a mask, to form a via hole and an interconnection window simultaneously. The photo-resist layer is removed and the via hole and the interconnection window are filled with a second metal layer. The second metal layer is etched until the inter-metal dielectric layer under the isolation region is exposed. A second inter-metal dielectric layer is formed.