The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 19, 2000
Filed:
Dec. 02, 1998
Keon Yang Park, Seoul, KR;
Byung Kook Sun, Taejeon-si, KR;
Jae Heun Joung, Cheongju-si, KR;
Dong Shin, Taejeon-si, KR;
Samsung Electro-Mechanics Co., Ltd., Kyungki-Do, KR;
Abstract
A method for manufacturing a build-up multi-layer printed circuit board for use in computers, VTR, or portable telephones is disclosed, in which the method of forming a hole in a circuit layer and the method of forming a hole in an insulating layer are made different from each other by applying a combined formation method, thereby improving the formation precision and efficiency in forming the holes. Specifically, a resin-clad copper foil (RCC) is stacked on a CCL (copper-clad laminate) after forming a printed circuit layer, and this structure is heated and pressed. Then, beams of an Nd-YAG laser are irradiated to remove the copper-clad layer, and then beams of CO.sub.2 laser are irradiated to remove the residual resin insulator, thereby forming a via hole. Then, circuit patterns are formed on the board on which the via hole has been formed.